Abstract: In the cell placement problem a circuit’s cells must be placed within a specified chip
area so that they are row aligned and contain no overlaps. The problem is usually tackled in
phases, whereby in the first phase a global placer performs an initial spreading of cells with
regards to some optimization criterion, most commonly wire length minimization. The output
of the first phase might violate alignment and overlap constraints, therefore in a second
phase, called legalization, the target is to restore constraint violations while incurring …