Antonios N Dadaliaris, Evangelia Nerantzaki, Panagiotis Oikonomou, Yannis Hatzaras, Angeliki-Olympia Troumpoulou, Ioannis Arvanitakis, Georgios I Stamoulis
Proceedings of the SouthEast European Design Automation, Computer Engineering, Computer Networks and Social Media Conference
Publication year: 2016

Abstract Legalization and detailed placement methods for standard cell designs, are two of
the most notable topics in current VLSI research. Being the final steps in a classic placement
procedure they must be efficient in terms of the delay overhead they introduce to the overall
design flow and the quality of the final solution. In this paper we present a combined solution
of the aforementioned steps, based on Tetris a particular simple and fast legalization
algorithm, that produces considerable results taking into account the tradeoff between